Advancements in digital technologies have permitted the development, and implementation, of many new products. Products pertaining to, and including, digital processing circuitry, are exemplary of products possible as a result of such advancements.
Repetitive functions can be carried out by digital processing circuitry at rates significantly more rapidly than the manual performance of such functions. The rapid rate at which the digital processing circuitry is able to repeatedly perform such functions has permitted activities, previously considered impractical, to be readily implementable.
Processing of large amounts of data is, e.g., advantageously effectuated through the use of a product, including, or formed of, digital processing circuitry. For instance, in a computer system, data is transferred between peripheral devices and a CPU (central processing unit). In processing of the data, data is read from, or written to, data storage locations in successive read and write operations.
The data that is processed is in digital form. That is to say, the data is stored in the form of binary bits. The binary bits forming the data are transferred when reading or writing the data to effectuate the processing operations. Errors are sometimes introduced during the transfer of the data. The errors are introduced as a result of, for example, channel distortion or noise. The effects of the data storage locations at which the data is stored can also introduce errors into the data.
To ensure data integrity, the errors in the data must typically be corrected. Encoding techniques are sometimes utilized to encode data prior to its transfer. Such encoding of the data facilitates error correction of the data, subsequent to its transfer. Decoding of the data is performed to recreate the value of the data prior to its encoding and transfer.
Various encoding schemes have been developed and used to encode data. Block-encoding schemes by which blocks of digital data are encoded, for example, are oftentimes utilized in mass storage systems. Reed-Solomon coding is exemplary of a block-encoding scheme sometimes utilized to encode digital data. Standardized encoding schemes have been set forth, for instance, for the encoding of blocks of data stored on the optical storage devices, such as CD-ROM storage devices. In such storage devices, data is formatted into blocks formed of two-dimensional arrays of data. The blocks of data include ECC (error correction code) as a portion thereof. The ECC is utilized during error-correction operations to detect data errors contained in the block of data.
Error-correction operations however, are computationally-intensive. As products and systems in which data is transferred cause data transfer to be effectuated at quicker rates, the rates at which error-correction operations must be performed correspondingly must be increased. Some conventional error-correction operations are performed by execution of the ECC error-correction algorithms by a general-purpose microprocessor or a specialized, ECC-processor. The use of software algorithms to effectuate ECC error-correction operations permit system flexibility as the software algorithms can be substituted with others depending upon the error-correction operations to be performed. That is to say, software implementations of ECC operations are easily alterable, or replaceable. But, execution of a software algorithm is inherently serial. Rates at which error-correction operations utilizing conventional software algorithms, executable by processors, are relatively slow because of the necessary, serial execution of the algorithms.
Other, conventional ECC operations are hardware-implemented. That is to say, dedicated hardware is provided to implement error-correction operations. Such hardware implementations are more readily able to perform error-correction operations at high data rates. But, hardware implementations are not adaptable to changes.
Conventional, software-implemented error-correction apparatus and methods, while advantageously flexible, are relatively slow. And, conventional, hardware-implemented error-correction apparatus and methods, while relatively fast, are relatively inflexible.
A manner by which to utilized the advantages of both software- and hardware-implemented error-correction apparatus and methods would therefore be advantageous.
It is in light of this background information related to error-correction operations that the significant improvements of the present invention have evolved.